- Revenue: USD20.8 billion for Q2 2024, a 10.3% increase in US dollars sequentially.
- Gross Margin: 53.2%, a 10 basis points increase sequentially.
- Operating Margin: 42.5%, a 0.5 percentage point increase sequentially.
- EPS: TWD9.56 for Q2 2024.
- ROE: 26.7% for Q2 2024.
- 3-nanometer Revenue Contribution: 15% of wafer revenue.
- 5-nanometer Revenue Contribution: 35% of wafer revenue.
- 7-nanometer Revenue Contribution: 17% of wafer revenue.
- Advanced Technology Revenue: 67% of wafer revenue (7-nanometer and below).
- HPC Revenue Contribution: 52% of Q2 revenue, a 28% increase quarter over quarter.
- Smartphone Revenue Contribution: 33%, a 1% decrease quarter over quarter.
- IoT Revenue Contribution: 6%, a 6% increase quarter over quarter.
- Automotive Revenue Contribution: 5%, a 5% increase quarter over quarter.
- DCE Revenue Contribution: 2%, a 20% increase quarter over quarter.
- Cash and Marketable Securities: TWD2 trillion (USD63 billion) at the end of Q2 2024.
- CapEx: TWD206 billion (USD6.36 billion) for Q2 2024.
- Cash Flow from Operations: TWD378 billion for Q2 2024.
- Third Quarter Revenue Guidance: USD22.4 billion to USD23.2 billion.
- Third Quarter Gross Margin Guidance: 53.5% to 55.5%.
- Third Quarter Operating Margin Guidance: 42.5% to 44.5%.
- 2024 Capital Budget: USD30 billion to USD32 billion.
Release Date: July 18, 2024
For the complete transcript of the earnings call, please refer to the full earnings call transcript.
Positive Points
- Second-quarter revenue increased by 13.6% sequentially in TWD and 10.3% in USD, driven by strong demand for 3- and 5-nanometer technologies.
- Gross margin improved by 10 basis points sequentially to 53.2%, reflecting cost improvements and favorable foreign exchange rates.
- Advanced technology (7-nanometer and below) accounted for 67% of wafer revenue, indicating strong demand for cutting-edge processes.
- HPC platform revenue increased by 28% quarter over quarter, now accounting for 52% of total revenue.
- TSMC raised its full-year 2024 revenue guidance, expecting a slight increase above mid-20s percent in USD terms.
Negative Points
- Continuous smartphone seasonality partially offset revenue gains, indicating ongoing volatility in this segment.
- N3 ramp-up and N5 to N3 tool conversion costs are expected to continue diluting margins.
- Higher electricity prices in Taiwan are contributing to increased operational costs.
- Overseas fabs in Arizona and Kumamoto are expected to dilute gross margins by 2-3 percentage points in the next several years.
- Capacity constraints remain a challenge, particularly for CoWoS and advanced packaging, potentially limiting customer growth.
Q & A Highlights
Q: How do you think about supply, demand balance for AI accelerator and CoWoS advanced packaging capacity?
A: The demand is very high, and we are working hard to meet it. We hope to reach a balance by 2025 or 2026. We are continuously increasing capacity, and next year, we plan to more than double it again.
Q: How should we think about gross margin looking forward for TSMC? Are we going to get back to the high 50%, 60% gross margin that we saw in 2022?
A: We face both positive and negative factors. While we are improving productivity and reducing dilution from N3, we also face cost challenges and overseas fab dilutions. We believe a 53% and higher gross margin is achievable, and with very high utilization rates, it could potentially reach the high 50% or 60% levels.
Q: How does TSMC plan to mitigate geopolitical risks, such as dependency on Taiwan for chip production?
A: We continue to expand our overseas fabs in Arizona, Kumamoto, and potentially Europe. There is no change to our strategy, and we are not considering joint ventures with governments.
Q: What is the progress of selling the value of TSMC's leading-edge capacity?
A: Our pricing strategy is strategic and ongoing. We are continuously sharing our value with customers, and our customers are doing well, which means we should do well too.
Q: Can you support the aggressive migration of AI chipmakers to leading-edge nodes like N2 and A16?
A: Yes, we are working hard to build the capacity to support this demand. Today, the capacity is very tight, but we aim to build enough capacity in the next year or two.
Q: Will N2 revenue contribution be larger than N3, and will the margin dilution be less?
A: Yes, N2 revenue contribution will be larger, and the gross margin dilution will be faster to reach corporate average.
Q: How does TSMC manage the risk of overbuilding capacity in the current strong demand environment for generative AI?
A: We employ a disciplined framework, using a top-down and bottom-up approach to evaluate demand. We believe AI demand is more real and sustainable compared to the demand surge during the COVID period.
Q: What are the implications of accelerated product launch cadences announced at COMPUTEX for TSMC?
A: We have been prepared for these changes as we have been discussing with our customers much earlier. This trend aligns with our strength in leading-edge development.
Q: Will TSMC explore fan-out panel-level packaging for larger AI chips?
A: Yes, we are looking into it, but the maturity is not yet there. We expect it to be introduced in about three years, and we are working on it.
Q: What are the biggest bottlenecks in expanding A16 capacity?
A: The biggest bottlenecks include land, electricity, and talented people. We need all of these to expand our capacity.
For the complete transcript of the earnings call, please refer to the full earnings call transcript.
